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Searched refs:CLK_TOP_I2C_SEL (Results 1 – 6 of 6) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt8512-clk.h94 #define CLK_TOP_I2C_SEL 83 macro
A Dmt8516-clk.h97 #define CLK_TOP_I2C_SEL 73 macro
A Dmt8518-clk.h100 #define CLK_TOP_I2C_SEL 78 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt8512.c532 MUX_CLR_SET_UPD_FLAGS(CLK_TOP_I2C_SEL, i2c_parents,
773 GATE_INFRA4(CLK_INFRA_I2C0_AXI, CLK_TOP_I2C_SEL, 24),
774 GATE_INFRA4(CLK_INFRA_I2C1_AXI, CLK_TOP_I2C_SEL, 25),
775 GATE_INFRA4(CLK_INFRA_I2C2_AXI, CLK_TOP_I2C_SEL, 26),
A Dclk-mt8516.c522 MUX(CLK_TOP_I2C_SEL, i2c_parents, 0x040, 28, 2),
708 GATE_TOP3(CLK_TOP_RG_I2C, CLK_TOP_I2C_SEL, 12),
A Dclk-mt8518.c1198 MUX(CLK_TOP_I2C_SEL, i2c_parents, 0x040, 28, 3),
1453 GATE_TOP4(CLK_TOP_I2C, CLK_TOP_I2C_SEL, 12),

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