Searched refs:CLK_TOP_MEM_SEL (Results 1 – 9 of 9) sorted by relevance
/u-boot/include/dt-bindings/clock/ |
A D | mt8512-clk.h | 70 #define CLK_TOP_MEM_SEL 59 macro
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A D | mt7629-clk.h | 88 #define CLK_TOP_MEM_SEL 74 macro
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A D | mt7622-clk.h | 70 #define CLK_TOP_MEM_SEL 57 macro
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A D | mt7623-clk.h | 102 #define CLK_TOP_MEM_SEL 88 macro
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/u-boot/drivers/clk/mediatek/ |
A D | clk-mt7623.c | 511 MUX_GATE(CLK_TOP_MEM_SEL, mem_parents, 0x40, 8, 1, 15), 606 GATE_INFRA(CLK_INFRA_M4U, CLK_TOP_MEM_SEL, 8), 609 GATE_INFRA(CLK_INFRA_RAMBUFIF, CLK_TOP_MEM_SEL, 14), 610 GATE_INFRA(CLK_INFRA_CPUM, CLK_TOP_MEM_SEL, 15),
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A D | clk-mt8512.c | 454 MUX_CLR_SET_UPD_FLAGS(CLK_TOP_MEM_SEL, mem_parents,
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A D | clk-mt7622.c | 314 MUX_GATE(CLK_TOP_MEM_SEL, mem_parents, 0x40, 8, 1, 15),
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A D | clk-mt7629.c | 367 MUX_GATE(CLK_TOP_MEM_SEL, mem_parents, 0x40, 8, 1, 15),
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/u-boot/arch/arm/dts/ |
A D | mt7629.dtsi | 121 <&topckgen CLK_TOP_MEM_SEL>,
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