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Searched refs:CLK_TOP_MSDC0 (Results 1 – 6 of 6) sorted by relevance

/u-boot/arch/arm/dts/
A Dmt8518.dtsi94 clocks = <&topckgen CLK_TOP_MSDC0>,
95 <&topckgen CLK_TOP_MSDC0>,
A Dmt8516.dtsi119 clocks = <&topckgen_cg CLK_TOP_MSDC0>,
/u-boot/include/dt-bindings/clock/
A Dmt8516-clk.h144 #define CLK_TOP_MSDC0 19 macro
A Dmt8518-clk.h173 #define CLK_TOP_MSDC0 24 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt8516.c656 GATE_TOP1(CLK_TOP_MSDC0, CLK_TOP_MSDC0_SEL, 17),
694 GATE_TOP2_I(CLK_TOP_MSDC0_INFRA, CLK_TOP_MSDC0, 28),
A Dclk-mt8518.c1408 GATE_TOP1(CLK_TOP_MSDC0, CLK_TOP_MSDC0_SEL, 17),
1438 GATE_TOP2_I(CLK_TOP_MSDC0_B, CLK_TOP_MSDC0, 28),

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