Searched refs:CLK_TOP_MSDC0_SEL (Results 1 – 4 of 4) sorted by relevance
| /u-boot/include/dt-bindings/clock/ |
| A D | mt8516-clk.h | 75 #define CLK_TOP_MSDC0_SEL 51 macro
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| A D | mt8518-clk.h | 135 #define CLK_TOP_MSDC0_SEL 113 macro
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| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt8516.c | 498 MUX(CLK_TOP_MSDC0_SEL, msdc0_parents, 0x000, 11, 3),
656 GATE_TOP1(CLK_TOP_MSDC0, CLK_TOP_MSDC0_SEL, 17),
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| A D | clk-mt8518.c | 1242 MUX(CLK_TOP_MSDC0_SEL, msdc0_parents, 0xF4, 0, 8),
1408 GATE_TOP1(CLK_TOP_MSDC0, CLK_TOP_MSDC0_SEL, 17),
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