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Searched refs:CLK_TOP_MSDC2_CLK50_SEL (Results 1 – 2 of 2) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt8518-clk.h138 #define CLK_TOP_MSDC2_CLK50_SEL 116 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt8518.c1245 MUX(CLK_TOP_MSDC2_CLK50_SEL, msdc0_clk50_parents, 0xF4, 23, 6),

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