Searched refs:CLK_TOP_MSDC30_2_SEL (Results 1 – 2 of 2) sorted by relevance

/u-boot/include/dt-bindings/clock/
A D	mt7623-clk.h	114 #define CLK_TOP_MSDC30_2_SEL 100 macro
/u-boot/drivers/clk/mediatek/
A D	clk-mt7623.c	528 MUX_GATE(CLK_TOP_MSDC30_2_SEL, msdc30_parents, 0x70, 8, 3, 15), 664 GATE_PERI0(CLK_PERI_MSDC30_2, CLK_TOP_MSDC30_2_SEL, 15),

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