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Searched refs:CLK_TOP_MSDCPLL_D4 (Results 1 – 4 of 4) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt8183-clk.h102 #define CLK_TOP_MSDCPLL_D4 66 macro
A Dmt7623-clk.h66 #define CLK_TOP_MSDCPLL_D4 53 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt8183.c179 FACTOR(CLK_TOP_MSDCPLL_D4, CLK_APMIXED_MSDCPLL, 1,
350 CLK_TOP_MSDCPLL_D4
A Dclk-mt7623.c143 FACTOR0(CLK_TOP_MSDCPLL_D4, CLK_APMIXED_MSDCPLL, 1, 4),

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