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Searched refs:CLK_TOP_MUX_AUD_INTBUS (Results 1 – 2 of 2) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt8183-clk.h141 #define CLK_TOP_MUX_AUD_INTBUS 105 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt8183.c566 MUX(CLK_TOP_MUX_AUD_INTBUS, aud_intbus_parents, 0x90, 8, 2),

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