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Searched refs:CLK_TOP_MUX_DXCC (Results 1 – 2 of 2) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt8183-clk.h155 #define CLK_TOP_MUX_DXCC 119 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt8183.c583 MUX(CLK_TOP_MUX_DXCC, dxcc_parents, 0xc0, 24, 2),
713 GATE_INFRA1(CLK_INFRA_DXCC_SEC_CORE, CLK_TOP_MUX_DXCC, 27),
714 GATE_INFRA1(CLK_INFRA_DXCC_AO, CLK_TOP_MUX_DXCC, 28),

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