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Searched refs:CLK_TOP_MUX_I2C (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/clk/mediatek/
A Dclk-mt8183.c580 MUX(CLK_TOP_MUX_I2C, i2c_parents, 0xc0, 0, 2),
673 GATE_INFRA0(CLK_INFRA_I2C0, CLK_TOP_MUX_I2C, 11),
674 GATE_INFRA0(CLK_INFRA_I2C1, CLK_TOP_MUX_I2C, 12),
675 GATE_INFRA0(CLK_INFRA_I2C2, CLK_TOP_MUX_I2C, 13),
676 GATE_INFRA0(CLK_INFRA_I2C3, CLK_TOP_MUX_I2C, 14),
678 GATE_INFRA0(CLK_INFRA_PWM1, CLK_TOP_MUX_I2C, 16),
679 GATE_INFRA0(CLK_INFRA_PWM2, CLK_TOP_MUX_I2C, 17),
680 GATE_INFRA0(CLK_INFRA_PWM3, CLK_TOP_MUX_I2C, 18),
682 GATE_INFRA0(CLK_INFRA_PWM, CLK_TOP_MUX_I2C, 21),
724 GATE_INFRA2(CLK_INFRA_I2C4, CLK_TOP_MUX_I2C, 7),
[all …]
/u-boot/include/dt-bindings/clock/
A Dmt8183-clk.h152 #define CLK_TOP_MUX_I2C 116 macro

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