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Searched refs:CLK_TOP_MUX_MSDC30_1 (Results 1 – 2 of 2) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt8183-clk.h138 #define CLK_TOP_MUX_MSDC30_1 102 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt8183.c562 MUX(CLK_TOP_MUX_MSDC30_1, msdc30_1_parents, 0x80, 16, 3),
704 GATE_INFRA1(CLK_INFRA_MSDC1_SCK, CLK_TOP_MUX_MSDC30_1, 16),

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