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Searched refs:CLK_TOP_MUX_SENINF (Results 1 – 2 of 2) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt8183-clk.h154 #define CLK_TOP_MUX_SENINF 118 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt8183.c582 MUX(CLK_TOP_MUX_SENINF, seninf_parents, 0xc0, 16, 2),

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