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Searched refs:CLK_TOP_MUX_UART (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/clk/mediatek/
A Dclk-mt8183.c557 MUX(CLK_TOP_MUX_UART, uart_parents, 0x70, 16, 1),
683 GATE_INFRA0(CLK_INFRA_UART0, CLK_TOP_MUX_UART, 22),
684 GATE_INFRA0(CLK_INFRA_UART1, CLK_TOP_MUX_UART, 23),
685 GATE_INFRA0(CLK_INFRA_UART2, CLK_TOP_MUX_UART, 24),
686 GATE_INFRA0(CLK_INFRA_UART3, CLK_TOP_MUX_UART, 25),
/u-boot/include/dt-bindings/clock/
A Dmt8183-clk.h134 #define CLK_TOP_MUX_UART 98 macro

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