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Searched refs:CLK_TOP_NFIECC_SEL (Results 1 – 2 of 2) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt8516-clk.h112 #define CLK_TOP_NFIECC_SEL 88 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt8516.c539 MUX(CLK_TOP_NFIECC_SEL, nfiecc_parents, 0x07c, 13, 3),
714 GATE_TOP3(CLK_TOP_RG_NFIECC, CLK_TOP_NFIECC_SEL, 18),

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