Searched refs:CLK_TOP_P1_1MHZ (Results 1 – 4 of 4) sorted by relevance
| /u-boot/include/dt-bindings/clock/ |
| A D | mt7629-clk.h | 24 #define CLK_TOP_P1_1MHZ 11 macro
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| A D | mt7622-clk.h | 23 #define CLK_TOP_P1_1MHZ 11 macro
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| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt7622.c | 95 FACTOR0(CLK_TOP_P1_1MHZ, CLK_APMIXED_ETH1PLL, 1, 500),
472 GATE_PCIE(CLK_PCIE_P1_AUX_EN, CLK_TOP_P1_1MHZ, 12),
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| A D | clk-mt7629.c | 89 FACTOR0(CLK_TOP_P1_1MHZ, CLK_APMIXED_ETH1PLL, 1, 500),
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