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Searched refs:CLK_TOP_PWM_QTR_26M (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/clk/mediatek/
A Dclk-mt7629.c95 FACTOR2(CLK_TOP_PWM_QTR_26M, CLK_XTAL, 1, 1),
473 GATE_PERI0(CLK_PERI_PWM1_PD, CLK_TOP_PWM_QTR_26M, 2),
474 GATE_PERI0(CLK_PERI_PWM2_PD, CLK_TOP_PWM_QTR_26M, 3),
475 GATE_PERI0(CLK_PERI_PWM3_PD, CLK_TOP_PWM_QTR_26M, 4),
476 GATE_PERI0(CLK_PERI_PWM4_PD, CLK_TOP_PWM_QTR_26M, 5),
477 GATE_PERI0(CLK_PERI_PWM5_PD, CLK_TOP_PWM_QTR_26M, 6),
478 GATE_PERI0(CLK_PERI_PWM6_PD, CLK_TOP_PWM_QTR_26M, 7),
479 GATE_PERI0(CLK_PERI_PWM7_PD, CLK_TOP_PWM_QTR_26M, 8),
480 GATE_PERI0(CLK_PERI_PWM_PD, CLK_TOP_PWM_QTR_26M, 9),
/u-boot/include/dt-bindings/clock/
A Dmt7629-clk.h30 #define CLK_TOP_PWM_QTR_26M 17 macro

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