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Searched refs:CLK_TOP_RG_APLL1_D4_EN (Results 1 – 2 of 2) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt8516-clk.h202 #define CLK_TOP_RG_APLL1_D4_EN 77 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt8516.c102 FACTOR1(CLK_TOP_APLL1_D8, CLK_TOP_RG_APLL1_D4_EN, 1, 2),
415 CLK_TOP_RG_APLL1_D4_EN,
717 GATE_TOP4_I(CLK_TOP_RG_APLL1_D4_EN, CLK_TOP_APLL1_D4, 9),

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