Searched refs:CLK_TOP_SCP_SEL (Results 1 – 6 of 6) sorted by relevance
| /u-boot/include/dt-bindings/clock/ |
| A D | mt7629-clk.h | 106 #define CLK_TOP_SCP_SEL 92 macro
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| A D | mt7622-clk.h | 88 #define CLK_TOP_SCP_SEL 75 macro
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| A D | mt7623-clk.h | 118 #define CLK_TOP_SCP_SEL 104 macro
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| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt7622.c | 340 MUX_GATE(CLK_TOP_SCP_SEL, ddrphycfg_parents, 0x80, 24, 2, 31),
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| A D | clk-mt7629.c | 393 MUX_GATE(CLK_TOP_SCP_SEL, scp_parents, 0x80, 24, 2, 31),
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| A D | clk-mt7623.c | 533 MUX_GATE(CLK_TOP_SCP_SEL, scp_parents, 0x80, 8, 2, 15),
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Completed in 12 milliseconds