Searched refs:CLK_TOP_SGMIIPLL_D2 (Results 1 – 5 of 5) sorted by relevance
| /u-boot/include/dt-bindings/clock/ |
| A D | mt7629-clk.h | 68 #define CLK_TOP_SGMIIPLL_D2 55 macro
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| A D | mt7622-clk.h | 60 #define CLK_TOP_SGMIIPLL_D2 48 macro
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| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt7629.c | 93 FACTOR1(CLK_TOP_TXCLK_SRC_PRE, CLK_TOP_SGMIIPLL_D2, 1, 1),
133 FACTOR0(CLK_TOP_SGMIIPLL_D2, CLK_APMIXED_SGMIPLL, 1, 2),
180 CLK_TOP_SGMIIPLL_D2,
192 CLK_TOP_SGMIIPLL_D2
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| A D | clk-mt7622.c | 98 FACTOR1(CLK_TOP_TXCLK_SRC_PRE, CLK_TOP_SGMIIPLL_D2, 1, 1),
132 FACTOR0(CLK_TOP_SGMIIPLL_D2, CLK_APMIXED_SGMIPLL, 1, 2),
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| /u-boot/arch/arm/dts/ |
| A D | mt7629.dtsi | 313 <&topckgen CLK_TOP_SGMIIPLL_D2>;
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