Searched refs:CLK_TOP_SPI2_SEL (Results 1 – 4 of 4) sorted by relevance
| /u-boot/include/dt-bindings/clock/ |
| A D | mt8518-clk.h | 141 #define CLK_TOP_SPI2_SEL 119 macro
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| A D | mt7623-clk.h | 142 #define CLK_TOP_SPI2_SEL 128 macro
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| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt7623.c | 565 MUX_GATE(CLK_TOP_SPI2_SEL, spi_parents, 0xF0, 0, 3, 7),
692 GATE_PERI1(CLK_PERI_SPI2, CLK_TOP_SPI2_SEL, 10),
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| A D | clk-mt8518.c | 1249 MUX(CLK_TOP_SPI2_SEL, spis_ck_parents, 0xF8, 14, 8),
1385 GATE_TOP0(CLK_TOP_SPI2, CLK_TOP_SPI2_SEL, 10),
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