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Searched refs:CLK_TOP_SPINFI_SEL (Results 1 – 4 of 4) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt8512-clk.h98 #define CLK_TOP_SPINFI_SEL 87 macro
A Dmt8518-clk.h134 #define CLK_TOP_SPINFI_SEL 112 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt8518.c1240 MUX(CLK_TOP_SPINFI_SEL, spinfi_parents, 0xDC, 8, 4),
1387 GATE_TOP0(CLK_TOP_SPINFI, CLK_TOP_SPINFI_SEL, 12),
A Dclk-mt8512.c545 MUX_CLR_SET_UPD_FLAGS(CLK_TOP_SPINFI_SEL, spinfi_parents,

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