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Searched refs:CLK_TOP_SPI_SEL (Results 1 – 4 of 4) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dmt8512-clk.h72 #define CLK_TOP_SPI_SEL 61 macro
A Dmt8516-clk.h106 #define CLK_TOP_SPI_SEL 82 macro
/u-boot/drivers/clk/mediatek/
A Dclk-mt8512.c460 MUX_CLR_SET_UPD_FLAGS(CLK_TOP_SPI_SEL, spi_parents,
747 GATE_INFRA2(CLK_INFRA_SPI, CLK_TOP_SPI_SEL, 1),
A Dclk-mt8516.c533 MUX(CLK_TOP_SPI_SEL, spi_parents, 0x07c, 1, 2),
662 GATE_TOP1(CLK_TOP_SPI, CLK_TOP_SPI_SEL, 23),

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