Searched refs:CLK_TOP_SYSPLL1_D16 (Results 1 – 6 of 6) sorted by relevance
| /u-boot/include/dt-bindings/clock/ |
| A D | mt8512-clk.h | 16 #define CLK_TOP_SYSPLL1_D16 5 macro
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| A D | mt7629-clk.h | 41 #define CLK_TOP_SYSPLL1_D16 28 macro
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| A D | mt7623-clk.h | 36 #define CLK_TOP_SYSPLL1_D16 23 macro
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| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt7629.c | 106 FACTOR0(CLK_TOP_SYSPLL1_D16, CLK_APMIXED_MAINPLL, 1, 32),
284 CLK_TOP_SYSPLL1_D16
298 CLK_TOP_SYSPLL1_D16,
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| A D | clk-mt7623.c | 111 FACTOR1(CLK_TOP_SYSPLL1_D16, CLK_TOP_SYSPLL_D2, 1, 16),
304 CLK_TOP_SYSPLL1_D16,
412 CLK_TOP_SYSPLL1_D16,
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| A D | clk-mt8512.c | 81 FACTOR0(CLK_TOP_SYSPLL1_D16, CLK_APMIXED_MAINPLL, 1, 32),
386 CLK_TOP_SYSPLL1_D16,
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Completed in 11 milliseconds