Searched refs:CLK_TOP_SYSPLL1_D8 (Results 1 – 9 of 9) sorted by relevance
| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt7629.c | 105 FACTOR0(CLK_TOP_SYSPLL1_D8, CLK_APMIXED_MAINPLL, 1, 16),
138 FACTOR1(CLK_TOP_AP2WBHIF_HCLK, CLK_TOP_SYSPLL1_D8, 1, 1),
171 CLK_TOP_SYSPLL1_D8
204 CLK_TOP_SYSPLL1_D8,
273 CLK_TOP_SYSPLL1_D8,
296 CLK_TOP_SYSPLL1_D8,
307 CLK_TOP_SYSPLL1_D8,
336 CLK_TOP_SYSPLL1_D8
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| A D | clk-mt8512.c | 80 FACTOR0(CLK_TOP_SYSPLL1_D8, CLK_APMIXED_MAINPLL, 1, 16),
140 CLK_TOP_SYSPLL1_D8,
279 CLK_TOP_SYSPLL1_D8
287 CLK_TOP_SYSPLL1_D8,
295 CLK_TOP_SYSPLL1_D8,
327 CLK_TOP_SYSPLL1_D8,
439 CLK_TOP_SYSPLL1_D8,
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| A D | clk-mt7623.c | 110 FACTOR1(CLK_TOP_SYSPLL1_D8, CLK_TOP_SYSPLL_D2, 1, 8),
206 CLK_TOP_SYSPLL1_D8
299 CLK_TOP_SYSPLL1_D8,
313 CLK_TOP_SYSPLL1_D8,
465 CLK_TOP_SYSPLL1_D8,
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| A D | clk-mt7622.c | 105 FACTOR0(CLK_TOP_SYSPLL1_D8, CLK_APMIXED_MAINPLL, 1, 16),
159 CLK_TOP_SYSPLL1_D8
192 CLK_TOP_SYSPLL1_D8,
290 CLK_TOP_SYSPLL1_D8,
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| /u-boot/include/dt-bindings/clock/ |
| A D | mt8512-clk.h | 15 #define CLK_TOP_SYSPLL1_D8 4 macro
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| A D | mt7629-clk.h | 40 #define CLK_TOP_SYSPLL1_D8 27 macro
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| A D | mt7622-clk.h | 33 #define CLK_TOP_SYSPLL1_D8 21 macro
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| A D | mt7623-clk.h | 35 #define CLK_TOP_SYSPLL1_D8 22 macro
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| /u-boot/arch/arm/dts/ |
| A D | mt7629.dtsi | 120 <&topckgen CLK_TOP_SYSPLL1_D8>,
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