Searched refs:CLK_TOP_SYSPLL3_D2 (Results 1 – 6 of 6) sorted by relevance
| /u-boot/include/dt-bindings/clock/ |
| A D | mt7629-clk.h | 46 #define CLK_TOP_SYSPLL3_D2 33 macro
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| A D | mt7622-clk.h | 37 #define CLK_TOP_SYSPLL3_D2 25 macro
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| A D | mt7623-clk.h | 40 #define CLK_TOP_SYSPLL3_D2 27 macro
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| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt7623.c | 115 FACTOR1(CLK_TOP_SYSPLL3_D2, CLK_TOP_SYSPLL_D5, 1, 2),
254 CLK_TOP_SYSPLL3_D2,
267 CLK_TOP_SYSPLL3_D2,
291 CLK_TOP_SYSPLL3_D2,
463 CLK_TOP_SYSPLL3_D2,
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| A D | clk-mt7622.c | 109 FACTOR0(CLK_TOP_SYSPLL3_D2, CLK_APMIXED_MAINPLL, 1, 10),
218 CLK_TOP_SYSPLL3_D2,
229 CLK_TOP_SYSPLL3_D2,
262 CLK_TOP_SYSPLL3_D2
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| A D | clk-mt7629.c | 111 FACTOR0(CLK_TOP_SYSPLL3_D2, CLK_APMIXED_MAINPLL, 1, 10),
232 CLK_TOP_SYSPLL3_D2,
243 CLK_TOP_SYSPLL3_D2,
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Completed in 23 milliseconds