Searched refs:CLK_TOP_SYSPLL4_D4 (Results 1 – 6 of 6) sorted by relevance
| /u-boot/include/dt-bindings/clock/ |
| A D | mt7629-clk.h | 50 #define CLK_TOP_SYSPLL4_D4 37 macro
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| A D | mt7622-clk.h | 40 #define CLK_TOP_SYSPLL4_D4 28 macro
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| A D | mt7623-clk.h | 43 #define CLK_TOP_SYSPLL4_D4 30 macro
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| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt7622.c | 112 FACTOR0(CLK_TOP_SYSPLL4_D4, CLK_APMIXED_MAINPLL, 1, 28),
231 CLK_TOP_SYSPLL4_D4,
283 CLK_TOP_SYSPLL4_D4,
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| A D | clk-mt7629.c | 115 FACTOR0(CLK_TOP_SYSPLL4_D4, CLK_APMIXED_MAINPLL, 1, 28),
245 CLK_TOP_SYSPLL4_D4,
283 CLK_TOP_SYSPLL4_D4,
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| A D | clk-mt7623.c | 118 FACTOR1(CLK_TOP_SYSPLL4_D4, CLK_TOP_SYSPLL_D7, 1, 4),
368 CLK_TOP_SYSPLL4_D4,
436 CLK_TOP_SYSPLL4_D4
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