Searched refs:CLK_TOP_SYSPLL_D2 (Results 1 – 8 of 8) sorted by relevance
/u-boot/drivers/clk/mediatek/ |
A D | clk-mt8183.c | 82 FACTOR(CLK_TOP_SYSPLL_D2, CLK_TOP_SYSPLL_CK, 1, 90 FACTOR(CLK_TOP_SYSPLL_D2_D2, CLK_TOP_SYSPLL_D2, 1, 92 FACTOR(CLK_TOP_SYSPLL_D2_D4, CLK_TOP_SYSPLL_D2, 1, 94 FACTOR(CLK_TOP_SYSPLL_D2_D8, CLK_TOP_SYSPLL_D2, 1, 96 FACTOR(CLK_TOP_SYSPLL_D2_D16, CLK_TOP_SYSPLL_D2, 1, 224 CLK_TOP_SYSPLL_D2, 514 CLK_TOP_SYSPLL_D2,
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A D | clk-mt7623.c | 104 FACTOR0(CLK_TOP_SYSPLL_D2, CLK_APMIXED_MAINPLL, 1, 2), 108 FACTOR1(CLK_TOP_SYSPLL1_D2, CLK_TOP_SYSPLL_D2, 1, 2), 109 FACTOR1(CLK_TOP_SYSPLL1_D4, CLK_TOP_SYSPLL_D2, 1, 4), 110 FACTOR1(CLK_TOP_SYSPLL1_D8, CLK_TOP_SYSPLL_D2, 1, 8), 111 FACTOR1(CLK_TOP_SYSPLL1_D16, CLK_TOP_SYSPLL_D2, 1, 16), 422 CLK_TOP_SYSPLL_D2,
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A D | clk-mt7629.c | 102 FACTOR0(CLK_TOP_SYSPLL_D2, CLK_APMIXED_MAINPLL, 1, 2), 356 CLK_TOP_SYSPLL_D2
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A D | clk-mt7622.c | 102 FACTOR0(CLK_TOP_SYSPLL_D2, CLK_APMIXED_MAINPLL, 1, 2),
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/u-boot/include/dt-bindings/clock/ |
A D | mt7629-clk.h | 37 #define CLK_TOP_SYSPLL_D2 24 macro
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A D | mt7622-clk.h | 30 #define CLK_TOP_SYSPLL_D2 18 macro
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A D | mt8183-clk.h | 42 #define CLK_TOP_SYSPLL_D2 6 macro
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A D | mt7623-clk.h | 29 #define CLK_TOP_SYSPLL_D2 16 macro
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