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Searched refs:CLK_TOP_SYSPLL_D7 (Results 1 – 8 of 8) sorted by relevance

/u-boot/drivers/clk/mediatek/
A Dclk-mt8183.c88 FACTOR(CLK_TOP_SYSPLL_D7, CLK_APMIXED_MAINPLL, 1,
108 FACTOR(CLK_TOP_SYSPLL_D7_D2, CLK_TOP_SYSPLL_D7, 1,
110 FACTOR(CLK_TOP_SYSPLL_D7_D4, CLK_TOP_SYSPLL_D7, 1,
198 CLK_TOP_SYSPLL_D7,
372 CLK_TOP_SYSPLL_D7,
380 CLK_TOP_SYSPLL_D7,
A Dclk-mt7629.c113 FACTOR0(CLK_TOP_SYSPLL_D7, CLK_APMIXED_MAINPLL, 1, 7),
211 CLK_TOP_SYSPLL_D7
264 CLK_TOP_SYSPLL_D7,
275 CLK_TOP_SYSPLL_D7,
A Dclk-mt7623.c107 FACTOR0(CLK_TOP_SYSPLL_D7, CLK_APMIXED_MAINPLL, 1, 7),
117 FACTOR1(CLK_TOP_SYSPLL4_D2, CLK_TOP_SYSPLL_D7, 1, 2),
118 FACTOR1(CLK_TOP_SYSPLL4_D4, CLK_TOP_SYSPLL_D7, 1, 4),
364 CLK_TOP_SYSPLL_D7,
A Dclk-mt8512.c88 FACTOR0(CLK_TOP_SYSPLL_D7, CLK_APMIXED_MAINPLL, 1, 7),
315 CLK_TOP_SYSPLL_D7,
/u-boot/include/dt-bindings/clock/
A Dmt8512-clk.h23 #define CLK_TOP_SYSPLL_D7 12 macro
A Dmt7629-clk.h48 #define CLK_TOP_SYSPLL_D7 35 macro
A Dmt8183-clk.h45 #define CLK_TOP_SYSPLL_D7 9 macro
A Dmt7623-clk.h32 #define CLK_TOP_SYSPLL_D7 19 macro

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