Searched refs:CLK_TOP_UART1_SEL (Results 1 – 4 of 4) sorted by relevance
| /u-boot/include/dt-bindings/clock/ |
| A D | mt8516-clk.h | 77 #define CLK_TOP_UART1_SEL 53 macro
|
| A D | mt8518-clk.h | 89 #define CLK_TOP_UART1_SEL 67 macro
|
| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt8516.c | 500 MUX(CLK_TOP_UART1_SEL, uart1_parents, 0x000, 19, 1),
650 GATE_TOP1(CLK_TOP_UART1, CLK_TOP_UART1_SEL, 11),
|
| A D | clk-mt8518.c | 1185 MUX(CLK_TOP_UART1_SEL, uart0_parents, 0x000, 19, 1),
1403 GATE_TOP1(CLK_TOP_UART1, CLK_TOP_UART1_SEL, 11),
|
Completed in 10 milliseconds