Searched refs:CLK_TOP_UNIVPLL2_D4 (Results 1 – 9 of 9) sorted by relevance
| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt7629.c | 123 FACTOR1(CLK_TOP_UNIVPLL2_D4, CLK_TOP_UNIVPLL, 1, 12),
187 CLK_TOP_UNIVPLL2_D4
208 CLK_TOP_UNIVPLL2_D4,
222 CLK_TOP_UNIVPLL2_D4
236 CLK_TOP_UNIVPLL2_D4,
247 CLK_TOP_UNIVPLL2_D4,
263 CLK_TOP_UNIVPLL2_D4,
274 CLK_TOP_UNIVPLL2_D4,
301 CLK_TOP_UNIVPLL2_D4,
309 CLK_TOP_UNIVPLL2_D4
[all …]
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| A D | clk-mt8512.c | 97 FACTOR1(CLK_TOP_UNIVPLL2_D4, CLK_TOP_UNIVPLL, 1, 12),
164 CLK_TOP_UNIVPLL2_D4,
175 CLK_TOP_UNIVPLL2_D4,
249 CLK_TOP_UNIVPLL2_D4,
273 CLK_TOP_UNIVPLL2_D4,
296 CLK_TOP_UNIVPLL2_D4,
330 CLK_TOP_UNIVPLL2_D4,
392 CLK_TOP_UNIVPLL2_D4
434 CLK_TOP_UNIVPLL2_D4,
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| A D | clk-mt7622.c | 121 FACTOR1(CLK_TOP_UNIVPLL2_D4, CLK_TOP_UNIVPLL, 1, 12),
136 FACTOR1(CLK_TOP_TO_USB3_REF, CLK_TOP_UNIVPLL2_D4, 1, 4),
174 CLK_TOP_UNIVPLL2_D4
195 CLK_TOP_UNIVPLL2_D4,
208 CLK_TOP_UNIVPLL2_D4
222 CLK_TOP_UNIVPLL2_D4,
233 CLK_TOP_UNIVPLL2_D4,
303 CLK_TOP_UNIVPLL2_D4
488 GATE_PCIE(CLK_SATA_PM_EN, CLK_TOP_UNIVPLL2_D4, 30),
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| A D | clk-mt7623.c | 133 FACTOR1(CLK_TOP_UNIVPLL2_D4, CLK_TOP_UNIVPLL_D3, 1, 4),
222 CLK_TOP_UNIVPLL2_D4,
269 CLK_TOP_UNIVPLL2_D4,
285 CLK_TOP_UNIVPLL2_D4,
294 CLK_TOP_UNIVPLL2_D4
387 CLK_TOP_UNIVPLL2_D4
428 CLK_TOP_UNIVPLL2_D4,
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| /u-boot/include/dt-bindings/clock/ |
| A D | mt8512-clk.h | 32 #define CLK_TOP_UNIVPLL2_D4 21 macro
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| A D | mt7629-clk.h | 58 #define CLK_TOP_UNIVPLL2_D4 45 macro
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| A D | mt7622-clk.h | 49 #define CLK_TOP_UNIVPLL2_D4 37 macro
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| A D | mt7623-clk.h | 57 #define CLK_TOP_UNIVPLL2_D4 44 macro
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| /u-boot/arch/arm/dts/ |
| A D | mt7629.dtsi | 348 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL2_D4>;
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