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Searched refs:CLK_TOP_UNIVPLL_D10 (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/clk/mediatek/
A Dclk-mt8518.c97 FACTOR0(CLK_TOP_UNIVPLL_D10, CLK_APMIXED_UNIVPLL, 1, 10),
301 CLK_TOP_UNIVPLL_D10,
344 CLK_TOP_UNIVPLL_D10,
356 CLK_TOP_UNIVPLL_D10,
366 CLK_TOP_UNIVPLL_D10,
453 CLK_TOP_UNIVPLL_D10
474 CLK_TOP_UNIVPLL_D10,
647 CLK_TOP_UNIVPLL_D10,
779 CLK_TOP_UNIVPLL_D10,
838 CLK_TOP_UNIVPLL_D10,
/u-boot/include/dt-bindings/clock/
A Dmt8518-clk.h51 #define CLK_TOP_UNIVPLL_D10 29 macro

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