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Searched refs:CLK_TOP_UNIVPLL_D20 (Results 1 – 4 of 4) sorted by relevance

/u-boot/drivers/clk/mediatek/
A Dclk-mt8516.c94 FACTOR0(CLK_TOP_UNIVPLL_D20, CLK_APMIXED_UNIVPLL, 1, 20),
194 CLK_TOP_UNIVPLL_D20,
364 CLK_TOP_UNIVPLL_D20,
385 CLK_TOP_UNIVPLL_D20,
428 CLK_TOP_UNIVPLL_D20,
A Dclk-mt8518.c96 FACTOR0(CLK_TOP_UNIVPLL_D20, CLK_APMIXED_UNIVPLL, 1, 20),
221 CLK_TOP_UNIVPLL_D20,
273 CLK_TOP_UNIVPLL_D20,
283 CLK_TOP_UNIVPLL_D20,
767 CLK_TOP_UNIVPLL_D20
833 CLK_TOP_UNIVPLL_D20,
/u-boot/include/dt-bindings/clock/
A Dmt8516-clk.h52 #define CLK_TOP_UNIVPLL_D20 28 macro
A Dmt8518-clk.h50 #define CLK_TOP_UNIVPLL_D20 28 macro

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