Searched refs:CLK_TOP_UNIVPLL_D7 (Results 1 – 8 of 8) sorted by relevance
| /u-boot/include/dt-bindings/clock/ |
| A D | mt7629-clk.h | 65 #define CLK_TOP_UNIVPLL_D7 52 macro
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| A D | mt7622-clk.h | 56 #define CLK_TOP_UNIVPLL_D7 44 macro
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| A D | mt8183-clk.h | 61 #define CLK_TOP_UNIVPLL_D7 25 macro
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| A D | mt7623-clk.h | 48 #define CLK_TOP_UNIVPLL_D7 35 macro
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| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mt7629.c | 130 FACTOR1(CLK_TOP_UNIVPLL_D7, CLK_TOP_UNIVPLL, 1, 7),
160 CLK_TOP_UNIVPLL_D7,
181 CLK_TOP_UNIVPLL_D7,
325 CLK_TOP_UNIVPLL_D7
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| A D | clk-mt7622.c | 128 FACTOR1(CLK_TOP_UNIVPLL_D7, CLK_TOP_UNIVPLL, 1, 7),
149 CLK_TOP_UNIVPLL_D7
169 CLK_TOP_UNIVPLL_D7
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| A D | clk-mt8183.c | 117 FACTOR(CLK_TOP_UNIVPLL_D7, CLK_TOP_UNIVPLL, 1, 7, CLK_PARENT_TOPCKGEN),
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| A D | clk-mt7623.c | 124 FACTOR0(CLK_TOP_UNIVPLL_D7, CLK_APMIXED_UNIVPLL, 1, 7),
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