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Searched refs:CLK_USB_PHY2 (Results 1 – 12 of 12) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dsun8i-h3-ccu.h123 #define CLK_USB_PHY2 90 macro
A Dsun50i-h616-ccu.h87 #define CLK_USB_PHY2 101 macro
A Dsun6i-a31-ccu.h136 #define CLK_USB_PHY2 102 macro
A Dsun8i-r40-ccu.h146 #define CLK_USB_PHY2 126 macro
/u-boot/drivers/clk/sunxi/
A Dclk_a31.c47 [CLK_USB_PHY2] = GATE(0x0cc, BIT(10)),
A Dclk_h3.c45 [CLK_USB_PHY2] = GATE(0x0cc, BIT(10)),
A Dclk_h616.c42 [CLK_USB_PHY2] = GATE(0xa78, BIT(29)),
A Dclk_r40.c51 [CLK_USB_PHY2] = GATE(0x0cc, BIT(10)),
/u-boot/arch/arm/dts/
A Dsun50i-h616.dtsi525 <&ccu CLK_USB_PHY2>,
A Dsun8i-r40.dtsi255 <&ccu CLK_USB_PHY2>;
A Dsunxi-h3-h5.dtsi270 <&ccu CLK_USB_PHY2>,
A Dsun6i-a31.dtsi490 <&ccu CLK_USB_PHY2>;

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