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Searched refs:CM_CLKSEL_DPLL_M_MASK (Results 1 – 6 of 6) sorted by relevance

/u-boot/drivers/clk/ti/
A Dclk-am3-dpll.c100 v &= ~CM_CLKSEL_DPLL_M_MASK; in clk_ti_am3_dpll_set_rate()
102 CM_CLKSEL_DPLL_M_MASK; in clk_ti_am3_dpll_set_rate()
145 m = v & CM_CLKSEL_DPLL_M_MASK; in clk_ti_am3_dpll_get_rate()
/u-boot/arch/arm/mach-omap2/am33xx/
A Dclock.c88 temp &= ~CM_CLKSEL_DPLL_M_MASK; in do_setup_dpll()
89 temp |= (params->m << CM_CLKSEL_DPLL_M_SHIFT) & CM_CLKSEL_DPLL_M_MASK; in do_setup_dpll()
/u-boot/arch/arm/include/asm/arch-am33xx/
A Dclock.h77 #define CM_CLKSEL_DPLL_M_MASK (0x7FF << 8) macro
/u-boot/arch/arm/include/asm/arch-omap4/
A Dclock.h54 #define CM_CLKSEL_DPLL_M_MASK (0x7FF << 8) macro
/u-boot/arch/arm/include/asm/arch-omap5/
A Dclock.h59 #define CM_CLKSEL_DPLL_M_MASK (0x7FF << 8) macro
/u-boot/arch/arm/mach-omap2/
A Dclocks-common.c230 M = (temp & CM_CLKSEL_DPLL_M_MASK) >> CM_CLKSEL_DPLL_M_SHIFT; in do_setup_dpll()
250 temp &= ~CM_CLKSEL_DPLL_M_MASK; in do_setup_dpll()
251 temp |= (params->m << CM_CLKSEL_DPLL_M_SHIFT) & CM_CLKSEL_DPLL_M_MASK; in do_setup_dpll()

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