Searched refs:CONFIG_DIMM_SLOTS_PER_CTLR (Results 1 – 25 of 62) sorted by relevance
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50 #if (CONFIG_SYS_NUM_DDR_CTLRS == 1) && (CONFIG_DIMM_SLOTS_PER_CTLR == 1)51 u8 spd_i2c_addr[CONFIG_SYS_NUM_DDR_CTLRS][CONFIG_DIMM_SLOTS_PER_CTLR] = {332 for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) { in __step_assign_addresses()349 for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) { in __step_assign_addresses()437 for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) { in __step_assign_addresses()461 for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) { in __step_assign_addresses()527 for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) { in fsl_ddr_compute()574 for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) { in fsl_ddr_compute()594 CONFIG_DIMM_SLOTS_PER_CTLR); in fsl_ddr_compute()883 info.dimm_slots_per_ctrl = CONFIG_DIMM_SLOTS_PER_CTLR; in fsl_ddr_sdram()[all …]
724 #if (CONFIG_DIMM_SLOTS_PER_CTLR == 1) in auto_bank_intlv()729 #elif (CONFIG_DIMM_SLOTS_PER_CTLR == 2) in auto_bank_intlv()771 #if (CONFIG_DIMM_SLOTS_PER_CTLR == 1) in populate_memctl_options()783 #elif (CONFIG_DIMM_SLOTS_PER_CTLR == 2) in populate_memctl_options()975 for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) { in populate_memctl_options()1218 #if (CONFIG_DIMM_SLOTS_PER_CTLR == 1) in populate_memctl_options()1225 #elif (CONFIG_DIMM_SLOTS_PER_CTLR == 2) in populate_memctl_options()1253 #if (CONFIG_DIMM_SLOTS_PER_CTLR == 1) in populate_memctl_options()1259 #elif (CONFIG_DIMM_SLOTS_PER_CTLR == 2) in populate_memctl_options()1268 #if (CONFIG_DIMM_SLOTS_PER_CTLR == 1) in populate_memctl_options()[all …]
52 for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) { in fsl_ddr_board_options()56 if (i >= CONFIG_DIMM_SLOTS_PER_CTLR) /* no DIMM */ in fsl_ddr_board_options()
89 if (CONFIG_DIMM_SLOTS_PER_CTLR == 1) { in fsl_ddr_board_options()92 } else if (CONFIG_DIMM_SLOTS_PER_CTLR == 2) { in fsl_ddr_board_options()
12 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro
44 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro45 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
72 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro73 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
118 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro119 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
13 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro
50 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro51 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
36 #define CONFIG_DIMM_SLOTS_PER_CTLR 2 macro37 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
19 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro
73 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro74 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
16 #define CONFIG_DIMM_SLOTS_PER_CTLR 2 macro
57 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro58 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
25 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro
88 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro89 #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
16 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 macro
33 for (slot = 0; slot < CONFIG_DIMM_SLOTS_PER_CTLR; slot++) { in fsl_ddr_board_options()38 if (slot >= CONFIG_DIMM_SLOTS_PER_CTLR) in fsl_ddr_board_options()
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