CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT (reference) in projects: u-boot

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Searched refs:CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT (Results 1 – 15 of 15) sorted by relevance

/u-boot/board/altera/arria5-socdk/qts/
A D	pll_config.h	`52 #define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT 0 macro`
/u-boot/board/is1/qts/
A D	pll_config.h	`52 #define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT 0 macro`
/u-boot/board/altera/cyclone5-socdk/qts/
A D	pll_config.h	`52 #define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT 0 macro`
/u-boot/board/aries/mcvevk/qts/
A D	pll_config.h	`52 #define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT 0 macro`
/u-boot/board/keymile/secu1/qts/
A D	pll_config.h	`52 #define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT 0 macro`
/u-boot/board/softing/vining_fpga/qts/
A D	pll_config.h	`52 #define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT 0 macro`
/u-boot/board/sr1500/qts/
A D	pll_config.h	`52 #define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT 0 macro`
/u-boot/board/devboards/dbm-soc1/qts/
A D	pll_config.h	`52 #define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT 0 macro`
/u-boot/board/ebv/socrates/qts/
A D	pll_config.h	`52 #define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT 0 macro`
/u-boot/board/terasic/de0-nano-soc/qts/
A D	pll_config.h	`52 #define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT 0 macro`
/u-boot/board/terasic/de10-nano/qts/
A D	pll_config.h	`52 #define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT 0 macro`
/u-boot/board/terasic/sockit/qts/
A D	pll_config.h	`52 #define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT 0 macro`
/u-boot/board/terasic/de1-soc/qts/
A D	pll_config.h	`52 #define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT 0 macro`
/u-boot/arch/arm/mach-socfpga/
A D	wrap_pll_config.c	`108 (CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT <<`
/u-boot/scripts/
A D	config_whitelist.txt	`689 CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT`

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