Searched refs:CONFIG_ROCKCHIP_STIMER_BASE (Results 1 – 15 of 15) sorted by relevance
/u-boot/arch/arm/mach-rockchip/ |
A D | tpl.c | 29 u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); in rockchip_stimer_init() 39 writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); in rockchip_stimer_init() 40 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE); in rockchip_stimer_init() 41 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4); in rockchip_stimer_init() 42 writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE + in rockchip_stimer_init()
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A D | rk3036-board-spl.c | 25 writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); in rockchip_stimer_init() 26 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE); in rockchip_stimer_init() 27 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4); in rockchip_stimer_init() 28 writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE + in rockchip_stimer_init()
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A D | px30-board-tpl.c | 29 writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); in secure_timer_init() 30 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_LOAD_COUNT0); in secure_timer_init() 31 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_LOAD_COUNT1); in secure_timer_init() 33 CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); in secure_timer_init()
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A D | spl.c | 84 u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); in rockchip_stimer_init() 92 writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); in rockchip_stimer_init() 93 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE); in rockchip_stimer_init() 94 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4); in rockchip_stimer_init() 95 writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE + in rockchip_stimer_init()
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/u-boot/arch/arm/mach-rockchip/rk3399/ |
A D | rk3399.c | 72 u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); in rockchip_stimer_init() 77 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_END_COUNT_L); in rockchip_stimer_init() 78 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_END_COUNT_H); in rockchip_stimer_init() 79 writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_INIT_COUNT_L); in rockchip_stimer_init() 80 writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_INIT_COUNT_H); in rockchip_stimer_init() 81 writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE + \ in rockchip_stimer_init()
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/u-boot/include/configs/ |
A D | rk3368_common.h | 21 #define CONFIG_ROCKCHIP_STIMER_BASE 0xff830020 macro
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A D | rk3128_common.h | 15 #define CONFIG_ROCKCHIP_STIMER_BASE 0x200440a0 macro
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A D | rk3036_common.h | 14 #define CONFIG_ROCKCHIP_STIMER_BASE 0x200440a0 macro
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A D | rk322x_common.h | 15 #define CONFIG_ROCKCHIP_STIMER_BASE 0x110d0020 macro
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A D | rk3328_common.h | 13 #define CONFIG_ROCKCHIP_STIMER_BASE 0xff1d0020 macro
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A D | rk3288_common.h | 17 #define CONFIG_ROCKCHIP_STIMER_BASE 0xff810020 macro
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A D | px30_common.h | 16 #define CONFIG_ROCKCHIP_STIMER_BASE 0xff220020 macro
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A D | rk3308_common.h | 25 #define CONFIG_ROCKCHIP_STIMER_BASE 0xff1b00a0 macro
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A D | rk3399_common.h | 15 #define CONFIG_ROCKCHIP_STIMER_BASE 0xff8680a0 macro
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/u-boot/scripts/ |
A D | config_whitelist.txt | 1371 CONFIG_ROCKCHIP_STIMER_BASE
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