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Searched refs:CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET (Results 1 – 8 of 8) sorted by relevance

/u-boot/arch/powerpc/cpu/mpc8xxx/
A Dsrio.c423 + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET, in srio_boot_master_release_slave()
439 + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET, in srio_boot_master_release_slave()
/u-boot/include/configs/
A DP2041RDB.h313 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
A Dcorenet_ds.h322 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
A DT208xRDB.h389 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
A DT208xQDS.h447 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
A DT102xRDB.h120 #define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 macro
/u-boot/drivers/pci/
A Dfsl_pci_init.c272 + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET; in fsl_pcie_boot_master_release_slave()
277 + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET; in fsl_pcie_boot_master_release_slave()
283 + CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET; in fsl_pcie_boot_master_release_slave()
/u-boot/scripts/
A Dconfig_whitelist.txt1601 CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET

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