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Searched refs:CONFIG_SYS_BR2_PRELIM (Results 1 – 25 of 29) sorted by relevance

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/u-boot/arch/powerpc/cpu/mpc83xx/elbc/
A Delbc.h70 #define CONFIG_SYS_BR2_PRELIM (\ macro
178 #define CONFIG_SYS_NAND_BR_PRELIM CONFIG_SYS_BR2_PRELIM
/u-boot/arch/powerpc/cpu/mpc8xxx/
A Dfsl_lbc.c77 #if defined(CONFIG_SYS_BR2_PRELIM) && defined(CONFIG_SYS_OR2_PRELIM) in init_early_memctl_regs()
79 set_lbc_br(2, CONFIG_SYS_BR2_PRELIM); in init_early_memctl_regs()
/u-boot/arch/powerpc/cpu/mpc8xx/
A Dcpu_init.c147 #if defined(CONFIG_SYS_OR2_PRELIM) && defined(CONFIG_SYS_BR2_PRELIM) in cpu_init_f()
149 out_be32(&memctl->memc_br2, CONFIG_SYS_BR2_PRELIM); in cpu_init_f()
/u-boot/board/freescale/mpc8541cds/
A Dmpc8541cds.c282 #if defined(CONFIG_SYS_OR2_PRELIM) && defined(CONFIG_SYS_BR2_PRELIM) in lbc_sdram_init()
298 set_lbc_br(2, CONFIG_SYS_BR2_PRELIM); in lbc_sdram_init()
/u-boot/board/freescale/mpc8555cds/
A Dmpc8555cds.c280 #if defined(CONFIG_SYS_OR2_PRELIM) && defined(CONFIG_SYS_BR2_PRELIM) in lbc_sdram_init()
296 set_lbc_br(2, CONFIG_SYS_BR2_PRELIM); in lbc_sdram_init()
/u-boot/board/freescale/mpc8568mds/
A Dmpc8568mds.c161 #if defined(CONFIG_SYS_OR2_PRELIM) && defined(CONFIG_SYS_BR2_PRELIM) in lbc_sdram_init()
176 set_lbc_br(2, CONFIG_SYS_BR2_PRELIM); in lbc_sdram_init()
/u-boot/include/configs/
A DM5272C3.h159 #define CONFIG_SYS_BR2_PRELIM 0x30000001 macro
A Dcobra5272.h267 #define CONFIG_SYS_BR2_PRELIM 0 macro
A DTQM834x.h65 #define CONFIG_SYS_BR2_PRELIM 0x00000000 macro
A Dsocrates.h144 #define CONFIG_SYS_BR2_PRELIM 0xc80018a1 /* UPMB, 32-bit */ macro
A DMPC8555CDS.h132 #define CONFIG_SYS_BR2_PRELIM 0xf0001861 macro
A DMPC8541CDS.h134 #define CONFIG_SYS_BR2_PRELIM 0xf0001861 macro
A DMPC8540ADS.h136 #define CONFIG_SYS_BR2_PRELIM 0xf0001861 macro
A Dcorenet_ds.h212 #define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ macro
217 #define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ macro
A DMPC8568MDS.h124 #define CONFIG_SYS_BR2_PRELIM 0xf0001861 macro
A DMPC8560ADS.h137 #define CONFIG_SYS_BR2_PRELIM 0xf0001861 macro
A Dxpedite520x.h121 #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_NAND_BASE | \ macro
A DMPC8548CDS.h191 #define CONFIG_SYS_BR2_PRELIM \ macro
A Dxpedite550x.h142 #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_NAND_BASE | \ macro
A Dxpedite537x.h140 #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_NAND_BASE | \ macro
/u-boot/board/freescale/mpc8548cds/
A Dmpc8548cds.c101 #if defined(CONFIG_SYS_OR2_PRELIM) && defined(CONFIG_SYS_BR2_PRELIM) in lbc_sdram_init()
116 set_lbc_br(2, CONFIG_SYS_BR2_PRELIM); in lbc_sdram_init()
/u-boot/configs/
A DMCR3000_defconfig26 CONFIG_SYS_BR2_PRELIM=0x08000801
/u-boot/board/sbc8349/
A Dsbc8349.c142 #if defined(CONFIG_SYS_BR2_PRELIM) \
/u-boot/board/freescale/mpc8349emds/
A Dmpc8349emds.c178 #if defined(CONFIG_SYS_BR2_PRELIM) \
/u-boot/arch/m68k/cpu/mcf52x2/
A Dcpu_init.c363 #if defined(CONFIG_SYS_OR2_PRELIM) && defined(CONFIG_SYS_BR2_PRELIM) in cpu_init_f()
364 out_be32(&csctrl->cs_br2, CONFIG_SYS_BR2_PRELIM); in cpu_init_f()

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