/u-boot/include/ |
A D | mpc85xx.h | 40 #undef CONFIG_SYS_CCSRBAR_PHYS_LOW 56 #ifndef CONFIG_SYS_CCSRBAR_PHYS_LOW 57 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR_DEFAULT macro 61 CONFIG_SYS_CCSRBAR_PHYS_LOW)
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/u-boot/include/configs/ |
A D | qemu-ppce500.h | 28 #define CONFIG_SYS_CCSRBAR_PHYS_LOW get_phys_ccsrbar_addr_early() macro 31 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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A D | socrates.h | 56 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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A D | sbc8641d.h | 78 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro 80 #define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR_PHYS_LOW
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A D | MPC8555CDS.h | 33 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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A D | MPC8541CDS.h | 33 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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A D | MPC8540ADS.h | 61 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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A D | controlcenterd.h | 106 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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A D | MPC8568MDS.h | 38 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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A D | MPC8560ADS.h | 62 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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A D | xpedite520x.h | 50 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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A D | sbc8548.h | 78 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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A D | MPC8548CDS.h | 44 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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A D | xpedite537x.h | 66 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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A D | xpedite550x.h | 65 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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A D | UCP1020.h | 165 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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A D | xpedite517x.h | 73 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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A D | P1010RDB.h | 254 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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A D | p1_p2_rdb_pc.h | 172 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR macro
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/u-boot/arch/arm/include/asm/arch-ls102xa/ |
A D | immap_ls102xa.h | 59 #undef CONFIG_SYS_CCSRBAR_PHYS_LOW 75 #ifndef CONFIG_SYS_CCSRBAR_PHYS_LOW 76 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_IMMR macro 80 CONFIG_SYS_CCSRBAR_PHYS_LOW)
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/u-boot/arch/arm/include/asm/arch-fsl-layerscape/ |
A D | immap_lsch2.h | 161 #undef CONFIG_SYS_CCSRBAR_PHYS_LOW 173 #ifndef CONFIG_SYS_CCSRBAR_PHYS_LOW 174 #define CONFIG_SYS_CCSRBAR_PHYS_LOW 0x01000000 macro 178 CONFIG_SYS_CCSRBAR_PHYS_LOW)
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/u-boot/arch/powerpc/cpu/mpc85xx/ |
A D | start.S | 485 #if !defined(CONFIG_SYS_CCSRBAR_PHYS_HIGH) || !defined(CONFIG_SYS_CCSRBAR_PHYS_LOW) 501 CONFIG_SYS_CCSRBAR_PHYS_LOW, MAS3_SW|MAS3_SR, \ 556 lis r1, CONFIG_SYS_CCSRBAR_PHYS_LOW@h 557 ori r1, r1, CONFIG_SYS_CCSRBAR_PHYS_LOW@l 595 lis r1, CONFIG_SYS_CCSRBAR_PHYS_LOW@h 596 ori r1, r1, CONFIG_SYS_CCSRBAR_PHYS_LOW@l 635 (CONFIG_SYS_CCSRBAR_PHYS_LOW >> 12)) 676 CONFIG_SYS_CCSRBAR_PHYS_LOW + 0xC20000, MAS3_SW|MAS3_SR, \ 797 lis r3, FSL_BOOKE_MAS3(CONFIG_SYS_CCSRBAR_PHYS_LOW, 0, (MAS3_SW|MAS3_SR))@h 798 ori r3, r3, FSL_BOOKE_MAS3(CONFIG_SYS_CCSRBAR_PHYS_LOW, 0, (MAS3_SW|MAS3_SR))@l
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/u-boot/arch/powerpc/cpu/mpc86xx/ |
A D | start.S | 881 lis r5, CONFIG_SYS_CCSRBAR_PHYS_LOW@h 882 ori r5, r5, CONFIG_SYS_CCSRBAR_PHYS_LOW@l
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/u-boot/scripts/ |
A D | config_whitelist.txt | 1745 CONFIG_SYS_CCSRBAR_PHYS_LOW
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/u-boot/ |
A D | README | 2693 * 1ull) << 32 | CONFIG_SYS_CCSRBAR_PHYS_LOW) 2701 - CONFIG_SYS_CCSRBAR_PHYS_LOW:
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