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Searched refs:CONFIG_SYS_CPLD_BASE (Results 1 – 25 of 30) sorted by relevance

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/u-boot/board/freescale/t208xrdb/
A Dcpld.c14 void *p = (void *)CONFIG_SYS_CPLD_BASE; in cpld_read()
21 void *p = (void *)CONFIG_SYS_CPLD_BASE; in cpld_write()
A Dtlb.c129 #ifdef CONFIG_SYS_CPLD_BASE
130 SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS,
/u-boot/board/freescale/t102xrdb/
A Dcpld.c17 void *p = (void *)CONFIG_SYS_CPLD_BASE; in cpld_read()
24 void *p = (void *)CONFIG_SYS_CPLD_BASE; in cpld_write()
A Dtlb.c96 #ifdef CONFIG_SYS_CPLD_BASE
97 SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS,
/u-boot/board/freescale/t104xrdb/
A Dcpld.c21 void *p = (void *)CONFIG_SYS_CPLD_BASE; in cpld_read()
28 void *p = (void *)CONFIG_SYS_CPLD_BASE; in cpld_write()
A Dtlb.c114 #ifdef CONFIG_SYS_CPLD_BASE
115 SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS,
A Dddr.c116 void __iomem *cpld_base = (void *)CONFIG_SYS_CPLD_BASE; in board_mem_sleep_setup()
/u-boot/board/freescale/t4rdb/
A Dcpld.c25 void *p = (void *)CONFIG_SYS_CPLD_BASE; in cpld_read()
32 void *p = (void *)CONFIG_SYS_CPLD_BASE; in cpld_write()
A Dtlb.c111 #ifdef CONFIG_SYS_CPLD_BASE
112 SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS,
/u-boot/include/configs/
A Dls1046ardb.h96 #define CONFIG_SYS_CPLD_BASE 0x7fb00000 macro
97 #define CPLD_BASE_PHYS CONFIG_SYS_CPLD_BASE
A Dls1021atwr.h155 #define CONFIG_SYS_CPLD_BASE 0x7fb00000 macro
156 #define CPLD_BASE_PHYS CONFIG_SYS_CPLD_BASE
A Dls1043ardb.h137 #define CONFIG_SYS_CPLD_BASE 0x7fb00000 macro
138 #define CPLD_BASE_PHYS CONFIG_SYS_CPLD_BASE
A DT208xRDB.h182 #define CONFIG_SYS_CPLD_BASE 0xffdf0000 macro
183 #define CONFIG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CONFIG_SYS_CPLD_BASE)
185 #define CONFIG_SYS_CSPR2 (CSPR_PHYS_ADDR(CONFIG_SYS_CPLD_BASE) \
A DT102xRDB.h248 #define CONFIG_SYS_CPLD_BASE 0xffdf0000 macro
249 #define CONFIG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CONFIG_SYS_CPLD_BASE)
251 #define CONFIG_SYS_CSPR2 (CSPR_PHYS_ADDR(CONFIG_SYS_CPLD_BASE) \
A Dmpc8308_p1m.h154 #define CONFIG_SYS_CPLD_BASE 0xFBFF8000 macro
A Dids8313.h151 #define CONFIG_SYS_CPLD_BASE 0xE3000000 macro
A DT4240RDB.h426 #define CONFIG_SYS_CPLD_BASE 0xffdf0000 macro
427 #define CONFIG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CONFIG_SYS_CPLD_BASE)
A DP1010RDB.h427 #define CONFIG_SYS_CPLD_BASE 0xffb00000 macro
432 #define CONFIG_SYS_CPLD_BASE_PHYS CONFIG_SYS_CPLD_BASE
/u-boot/board/freescale/ls1021atwr/
A Dls1021atwr.c102 struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); in cpld_show()
252 struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); in convert_serdes_mux()
326 struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); in config_board_mux()
608 struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); in convert_flash_bank()
642 struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); in cpld_reset_cmd()
669 struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); in print_serdes_mux()
/u-boot/board/freescale/ls1046ardb/
A Dcpld.c15 void *p = (void *)CONFIG_SYS_CPLD_BASE; in cpld_read()
22 void *p = (void *)CONFIG_SYS_CPLD_BASE; in cpld_write()
/u-boot/board/freescale/ls1043ardb/
A Dcpld.c15 void *p = (void *)CONFIG_SYS_CPLD_BASE; in cpld_read()
22 void *p = (void *)CONFIG_SYS_CPLD_BASE; in cpld_write()
/u-boot/board/ids/ids8313/
A Dids8313.c32 char *pcpld = (char *)CONFIG_SYS_CPLD_BASE; in checkboard()
158 #define IDSCPLD_SPI_CS_BASE (CONFIG_SYS_CPLD_BASE + 0xf)
/u-boot/board/freescale/p1010rdb/
A Dtlb.c67 SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS,
/u-boot/board/freescale/p1_p2_rdb_pc/
A Dtlb.c65 SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS,
A Dp1_p2_rdb_pc.c88 struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); in board_cpld_init()
165 struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); in checkboard()

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