CONFIG_SYS_DDR_RAW_TIMING (reference) in projects: u-boot

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Searched refs:CONFIG_SYS_DDR_RAW_TIMING (Results 1 – 18 of 18) sorted by relevance

/u-boot/board/freescale/ls1043ardb/
A D	ddr.c	`106 #ifdef CONFIG_SYS_DDR_RAW_TIMING 216 #ifdef CONFIG_SYS_DDR_RAW_TIMING in fsl_initdram() 228 #ifdef CONFIG_SYS_DDR_RAW_TIMING in fsl_initdram()`
A D	ddr.h	`47 #ifndef CONFIG_SYS_DDR_RAW_TIMING`
/u-boot/board/freescale/t102xrdb/
A D	ddr.c	`152 #ifdef CONFIG_SYS_DDR_RAW_TIMING 240 #ifndef CONFIG_SYS_DDR_RAW_TIMING in dram_init()`
/u-boot/include/configs/
A D	ls2080a_common.h	`30 #define CONFIG_SYS_DDR_RAW_TIMING macro`
A D	ls1043ardb.h	`23 #define CONFIG_SYS_DDR_RAW_TIMING macro`
A D	UCP1020.h	`176 #define CONFIG_SYS_DDR_RAW_TIMING macro`
A D	ls1021aqds.h	`90 #define CONFIG_SYS_DDR_RAW_TIMING macro`
A D	P1010RDB.h	`198 #define CONFIG_SYS_DDR_RAW_TIMING macro`
A D	T102xRDB.h	`195 #define CONFIG_SYS_DDR_RAW_TIMING macro`
A D	p1_p2_rdb_pc.h	`181 #define CONFIG_SYS_DDR_RAW_TIMING macro`
/u-boot/board/Arcturus/ucp1020/
A D	ddr.c	`20 #ifdef CONFIG_SYS_DDR_RAW_TIMING`
/u-boot/board/freescale/ls1021aqds/
A D	ddr.c	`112 #ifdef CONFIG_SYS_DDR_RAW_TIMING`
/u-boot/board/freescale/p1010rdb/
A D	ddr.c	`19 #ifndef CONFIG_SYS_DDR_RAW_TIMING`
/u-boot/board/freescale/p1_p2_rdb_pc/
A D	ddr.c	`16 #ifdef CONFIG_SYS_DDR_RAW_TIMING`
/u-boot/drivers/ddr/fsl/
A D	main.c	`534 #ifdef CONFIG_SYS_DDR_RAW_TIMING in fsl_ddr_compute() 571 #elif defined(CONFIG_SYS_DDR_RAW_TIMING) in fsl_ddr_compute()`
/u-boot/arch/powerpc/cpu/mpc85xx/
A D	cpu.c	`454 defined(CONFIG_SYS_DDR_RAW_TIMING) in dram_init()`
/u-boot/scripts/
A D	config_whitelist.txt	`2017 CONFIG_SYS_DDR_RAW_TIMING`
/u-boot/
A D	README	`2820 - CONFIG_SYS_DDR_RAW_TIMING`

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