| /u-boot/board/socrates/ |
| A D | tlb.c | 94 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
98 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000, CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000,
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| /u-boot/include/configs/ |
| A D | ls1012a_common.h | 24 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
26 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 macro
28 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
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| A D | ls1028a_common.h | 22 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL macro
24 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
59 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
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| A D | nsim.h | 16 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 macro
17 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
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| A D | tb100.h | 16 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 macro
17 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
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| A D | ls2080a_common.h | 36 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL macro
38 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
160 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
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| A D | axs10x.h | 23 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 macro
24 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
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| A D | hsdk-4xd.h | 25 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 macro
26 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
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| A D | hsdk.h | 24 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 macro
25 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
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| A D | ls1088a_common.h | 43 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL macro
45 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
150 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
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| A D | qemu-ppce500.h | 45 #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 macro
46 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
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| A D | lx2160a_common.h | 28 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL macro
36 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
52 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
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| A D | kontron_sl28.h | 26 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 macro
28 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
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| A D | ls1043a_common.h | 45 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 macro
47 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
227 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
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| A D | ls1046a_common.h | 45 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 macro
47 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
205 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
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| A D | ls1021atsn.h | 94 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL macro
95 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
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| A D | socrates.h | 65 #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 macro
66 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
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| /u-boot/board/sbc8641d/ |
| A D | law.c | 31 SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_1),
32 SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000,
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| /u-boot/board/freescale/p1_p2_rdb_pc/ |
| A D | tlb.c | 83 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
89 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
90 CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
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| /u-boot/board/freescale/t102xrdb/ |
| A D | tlb.c | 103 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
106 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
107 CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
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| /u-boot/board/freescale/t104xrdb/ |
| A D | tlb.c | 121 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
124 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
125 CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
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| /u-boot/board/freescale/corenet_ds/ |
| A D | ddr.c | 75 if (set_ddr_laws(CONFIG_SYS_DDR_SDRAM_BASE, in fixed_sdram()
85 if (set_ddr_laws(CONFIG_SYS_DDR_SDRAM_BASE, in fixed_sdram()
92 if (set_ddr_laws(CONFIG_SYS_DDR_SDRAM_BASE + ddr_size / 2, in fixed_sdram()
100 if (set_ddr_laws(CONFIG_SYS_DDR_SDRAM_BASE, in fixed_sdram()
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| /u-boot/board/gdsys/p1022/ |
| A D | tlb.c | 66 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
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| /u-boot/board/freescale/p1010rdb/ |
| A D | tlb.c | 77 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
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| /u-boot/board/Arcturus/ucp1020/ |
| A D | tlb.c | 80 SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
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