CONFIG_SYS_DDR_SDRAM_CLK_CNTL (reference) in projects: u-boot

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Searched refs:CONFIG_SYS_DDR_SDRAM_CLK_CNTL (Results 1 – 23 of 23) sorted by relevance

/u-boot/include/configs/km/
A D	km-mpc83xx.h	`13 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN \| \ macro`
/u-boot/board/gdsys/mpc8308/
A D	sdram.c	`51 out_be32(&im->ddr.sdram_clk_cntl, CONFIG_SYS_DDR_SDRAM_CLK_CNTL); in fixed_sdram()`
/u-boot/board/mpc8308_p1m/
A D	sdram.c	`44 out_be32(&im->ddr.sdram_clk_cntl, CONFIG_SYS_DDR_SDRAM_CLK_CNTL); in fixed_sdram()`
/u-boot/board/freescale/mpc8308rdb/
A D	sdram.c	`48 out_be32(&im->ddr.sdram_clk_cntl, CONFIG_SYS_DDR_SDRAM_CLK_CNTL); in fixed_sdram()`
/u-boot/board/freescale/mpc8315erdb/
A D	sdram.c	`66 im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL; in fixed_sdram()`
/u-boot/include/configs/
A D	mpc8308_p1m.h	`45 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 macro`
A D	sbc8349.h	`48 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN \| \ macro`
A D	vme8349.h	`53 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN \ macro`
A D	MPC8308RDB.h	`42 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 macro`
A D	caddy2.h	`53 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN \ macro`
A D	MPC8349EMDS.h	`54 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN \ macro`
A D	MPC8315ERDB.h	`38 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 macro`
A D	MPC8349ITX.h	`149 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN \ macro`
A D	MPC837XEMDS.h	`39 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 macro`
A D	MPC8349EMDS_SDRAM.h	`54 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN \ macro`
A D	MPC837XERDB.h	`64 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL 0x03000000 macro`
A D	hrcon.h	`30 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 macro`
A D	strider.h	`30 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 macro`
/u-boot/board/freescale/mpc837xerdb/
A D	mpc837xerdb.c	`109 im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL; in fixed_sdram()`
/u-boot/board/freescale/mpc8349itx/
A D	mpc8349itx.c	`76 im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL; in fixed_sdram()`
/u-boot/arch/powerpc/cpu/mpc83xx/
A D	spd_sdram.c	`770 #ifdef CONFIG_SYS_DDR_SDRAM_CLK_CNTL /* Optional platform specific value */ in spd_sdram() 771 ddr->sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL; in spd_sdram()`
/u-boot/board/freescale/mpc837xemds/
A D	mpc837xemds.c	`269 im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL; in fixed_sdram()`
/u-boot/scripts/
A D	config_whitelist.txt	`2024 CONFIG_SYS_DDR_SDRAM_CLK_CNTL`

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