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Searched refs:CONFIG_SYS_DDR_TIMING_0_800 (Results 1 – 4 of 4) sorted by relevance

/u-boot/board/freescale/corenet_ds/
A Dp4080ds_ddr.c37 #define CONFIG_SYS_DDR_TIMING_0_800 0xcc330104 macro
88 .timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0_800,
120 .timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0_800,
/u-boot/board/freescale/p1010rdb/
A Dddr.c27 .timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0_800,
/u-boot/include/configs/
A DP1010RDB.h233 #define CONFIG_SYS_DDR_TIMING_0_800 0x00110104 macro
/u-boot/scripts/
A Dconfig_whitelist.txt2031 CONFIG_SYS_DDR_TIMING_0_800

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