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Searched refs:CONFIG_SYS_DDR_TIMING_3_667 (Results 1 – 3 of 3) sorted by relevance

/u-boot/board/freescale/p1010rdb/
A Dddr.c53 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_667,
/u-boot/include/configs/
A DP1010RDB.h243 #define CONFIG_SYS_DDR_TIMING_3_667 0x00010000 macro
/u-boot/scripts/
A Dconfig_whitelist.txt2048 CONFIG_SYS_DDR_TIMING_3_667

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