Home
last modified time | relevance | path

Searched refs:CONFIG_SYS_FPGA_CSPR (Results 1 – 12 of 12) sorted by relevance

/u-boot/include/configs/
A Dls1046aqds.h242 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ macro
291 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
325 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
358 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
A Dls1043aqds.h224 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ macro
273 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
307 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
340 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
A Dls1088aqds.h176 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS_EARLY) \ macro
231 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
250 #define CONFIG_SYS_CSPR2 CONFIG_SYS_FPGA_CSPR
287 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
A Dls1028ardb.h52 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ macro
A Dls1028aqds.h47 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ macro
A Dls1021aqds.h226 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ macro
275 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
308 #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
A Dls1021atwr.h159 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(CPLD_BASE_PHYS) | \ macro
187 #define CONFIG_SYS_CSPR1 CONFIG_SYS_FPGA_CSPR
A Dls1088ardb.h151 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS_EARLY) \ macro
184 #define CONFIG_SYS_CSPR2 CONFIG_SYS_FPGA_CSPR
/u-boot/board/freescale/ls1046aqds/
A Dls1046aqds.c87 CONFIG_SYS_FPGA_CSPR,
142 CONFIG_SYS_FPGA_CSPR,
/u-boot/board/freescale/ls1043aqds/
A Dls1043aqds.c102 CONFIG_SYS_FPGA_CSPR,
157 CONFIG_SYS_FPGA_CSPR,
/u-boot/board/freescale/ls1088a/
A Dls1088a.c87 CONFIG_SYS_FPGA_CSPR,
122 CONFIG_SYS_FPGA_CSPR,
/u-boot/scripts/
A Dconfig_whitelist.txt2229 CONFIG_SYS_FPGA_CSPR

Completed in 19 milliseconds