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Searched refs:CONFIG_SYS_FSL_DDR2_ADDR (Results 1 – 10 of 10) sorted by relevance

/u-boot/drivers/ddr/fsl/
A Dutil.c38 #if defined(CONFIG_SYS_FSL_DDR2_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 1) in fsl_ddr_get_version()
40 ddr = (void *)CONFIG_SYS_FSL_DDR2_ADDR; in fsl_ddr_get_version()
194 ddr = (void __iomem *)CONFIG_SYS_FSL_DDR2_ADDR; in print_ddr_info()
354 #if defined(CONFIG_SYS_FSL_DDR2_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 1) in fsl_ddr_sync_memctl_refresh()
356 ddr = (void *)CONFIG_SYS_FSL_DDR2_ADDR; in fsl_ddr_sync_memctl_refresh()
A Dmpc86xx_ddr.c27 ddr = (void *)CONFIG_SYS_FSL_DDR2_ADDR; in fsl_ddr_set_memctl_regs()
A Darm_ddr_gen3.c45 #if defined(CONFIG_SYS_FSL_DDR2_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 1) in fsl_ddr_set_memctl_regs()
47 ddr = (void *)CONFIG_SYS_FSL_DDR2_ADDR; in fsl_ddr_set_memctl_regs()
A Dmpc85xx_ddr_gen3.c57 #if defined(CONFIG_SYS_FSL_DDR2_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 1) in fsl_ddr_set_memctl_regs()
59 ddr = (void *)CONFIG_SYS_FSL_DDR2_ADDR; in fsl_ddr_set_memctl_regs()
A Dfsl_ddr_gen4.c89 #if defined(CONFIG_SYS_FSL_DDR2_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 1) in fsl_ddr_set_memctl_regs()
91 ddr = (void *)CONFIG_SYS_FSL_DDR2_ADDR; in fsl_ddr_set_memctl_regs()
/u-boot/arch/powerpc/cpu/mpc85xx/
A Dcpu.c538 #if defined(CONFIG_SYS_FSL_DDR2_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 1) in dump_spd_ddr_reg()
540 ddr[i] = (void *)CONFIG_SYS_FSL_DDR2_ADDR; in dump_spd_ddr_reg()
/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
A Dimmap_lsch3.h14 #define CONFIG_SYS_FSL_DDR2_ADDR (CONFIG_SYS_IMMR + 0x00090000) macro
/u-boot/arch/powerpc/include/asm/
A Dimmap_86xx.h1190 #define CONFIG_SYS_FSL_DDR2_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC8xxx_DDR2_OFFSET) macro
A Dimmap_85xx.h2959 #define CONFIG_SYS_FSL_DDR2_ADDR \ macro
/u-boot/scripts/
A Dconfig_whitelist.txt2302 CONFIG_SYS_FSL_DDR2_ADDR

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