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Searched refs:CONFIG_SYS_FSL_DDR3_ADDR (Results 1 – 8 of 8) sorted by relevance

/u-boot/drivers/ddr/fsl/
A Dutil.c43 #if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 2) in fsl_ddr_get_version()
45 ddr = (void *)CONFIG_SYS_FSL_DDR3_ADDR; in fsl_ddr_get_version()
201 ddr = (void __iomem *)CONFIG_SYS_FSL_DDR3_ADDR; in print_ddr_info()
359 #if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 2) in fsl_ddr_sync_memctl_refresh()
361 ddr = (void *)CONFIG_SYS_FSL_DDR3_ADDR; in fsl_ddr_sync_memctl_refresh()
A Darm_ddr_gen3.c50 #if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 2) in fsl_ddr_set_memctl_regs()
52 ddr = (void *)CONFIG_SYS_FSL_DDR3_ADDR; in fsl_ddr_set_memctl_regs()
A Dmpc85xx_ddr_gen3.c62 #if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 2) in fsl_ddr_set_memctl_regs()
64 ddr = (void *)CONFIG_SYS_FSL_DDR3_ADDR; in fsl_ddr_set_memctl_regs()
A Dfsl_ddr_gen4.c94 #if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 2) in fsl_ddr_set_memctl_regs()
96 ddr = (void *)CONFIG_SYS_FSL_DDR3_ADDR; in fsl_ddr_set_memctl_regs()
/u-boot/arch/powerpc/cpu/mpc85xx/
A Dcpu.c543 #if defined(CONFIG_SYS_FSL_DDR3_ADDR) && (CONFIG_SYS_NUM_DDR_CTLRS > 2) in dump_spd_ddr_reg()
545 ddr[i] = (void *)CONFIG_SYS_FSL_DDR3_ADDR; in dump_spd_ddr_reg()
/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
A Dimmap_lsch3.h15 #define CONFIG_SYS_FSL_DDR3_ADDR 0x08210000 macro
/u-boot/scripts/
A Dconfig_whitelist.txt2304 CONFIG_SYS_FSL_DDR3_ADDR
/u-boot/arch/powerpc/include/asm/
A Dimmap_85xx.h2961 #define CONFIG_SYS_FSL_DDR3_ADDR \ macro

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